 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| AT27C2048 Features * Fast Read Access Time - 55 ns * Low Power CMOS Operation * - 100 A Maximum Standby - 35 mA Maximum Active at 5 MHz JEDEC Standard Packages - 40-Lead 600 mil PDIP - 44-Lead PLCC - 40-Lead TSOP (10 mm X 14 mm) Direct Upgrade from 512K bit and 1M bit (AT27C516 and AT27C1024) EPROMs 5V 10% Power Supply High Reliability CMOS Technology - 2,000V ESD Protection - 200 mA Latchup Immunity RapidTM Programming Algorithm - 50 s/word (typical) CMOS and TTL Compatible Inputs and Outputs Integrated Product Identification Code Commercial and Industrial Temperature Ranges * * * * * * * 2-Megabit (128K x 16) OTP EPROM AT27C2048 Description The AT27C2048 is a low-power, high performance 2,097,152-bit one-time programmable read only memory (OTP EPROM) organized 128K by 16 bits. It requires a single 5V power supply in normal read mode operation. Any word can be accessed in less than 55 ns, eliminating the need for speed-reducing WAIT states. The by-16 organization makes this part ideal for high-performance 16 and 32 bit microprocessor systems. (continued) Pin Configurations Pin Name A0 - A16 O0 - O15 CE OE PGM NC Note: PDIP Top View VPP CE O15 O14 O13 O12 O11 O10 O9 O8 GND O7 O6 O5 O4 O3 O2 O1 O0 OE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 VCC PGM A16 A15 A14 A13 A12 A11 A10 A9 GND A8 A7 A6 A5 A4 A3 A2 A1 A0 Function Addresses Outputs Chip Enable Output Enable Program No Connect Both GND pins must be connected. PLCC Top View O13 O14 O15 CE VPP DC VCC PGM A16 A15 A14 A9 A10 A11 A12 A13 A14 A15 A16 PGM VCC VPP CE O15 O14 O13 O12 O11 O10 O9 O8 TSOP Top View Type 1 A13 A12 A11 A10 A9 GND NC A8 A7 A6 A5 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 GND A8 A7 A6 A5 A4 A3 A2 A1 A0 OE O0 O1 O2 O3 O4 O5 O6 O7 GND O3 O2 O1 O0 OE DC A0 A1 A2 A3 A4 18 19 20 21 22 23 24 25 26 27 28 O12 O11 O10 O9 O8 GND NC O7 O6 O5 O4 7 8 9 10 11 12 13 14 15 16 17 6 5 4 3 2 1 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 0632B-A-06/97 Note: PLCC package pins 1 and 23 are DON'T CONNECT. 1 Description In read mode, the AT27C2048 typically consumes 15 mA. Standby mode supply current is typically less than 10 A. The AT27C2 048 is a va ila ble i n i ndus tr y st anda rd JEDEC-approved one-time programmable (OTP) plastic PDIP, PLCC, and TSOP packages. The device features two-line control (CE, OE) to eliminate bus contention in high-speed systems. With high density 128K word storage capability, the AT27C2048 allows firmware to be stored reliably and to be accessed by the system without the delays of mass storage media. Atmel's AT27C2048 has additional features that ensure high quality and efficient production use. The RapidTM Programming Algorithm reduces the time required to program the part and guarantees reliable programming. Programming time is typically only 50 s/word. The Integrated Product Identification Code electronically identifies the device and manufacturer. This feature is used by industry standard programming equipment to select the proper programming algorithms and voltages. System Considerations Switching between active and standby conditions via the Chip Enable pin may produce transient voltage excursions. Unless accommodated by the system design, these transients may exceed data sheet limits, resulting in device non-conformance. At a minimum, a 0.1 F high frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This capacitor should be connected between the VCC and Ground terminals of the device, as close to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit boards with large EPROM arrays, a 4.7 F bulk electrolytic capacitor should be utilized, again connected between the VCC and Ground terminals. This capacitor should be positioned as close as possible to the point where the power supply is connected to the array. 2 AT27C2048 AT27C2048 Block Diagram Absolute Maximum Ratings* *NOTICE: Temperature Under Bias ......................-55C to +125C Storage Temperature............................-65C to +150C Voltage on Any Pin with Respect to Ground ...............................-2.0V to +7.0V(1) Voltage on A9 with Respect to Ground ............................-2.0V to +14.0V(1) VPP Supply Voltage with Respect to Ground .............................-2.0V to +14.0V(1) Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note: Maximum voltage is -0.6V dc which may undershoot to 2.0V for pulses of less than 20 ns. Maximum output pin voltage is VCC + 0.75V dc which may overshoot to +7.0V for pulses of less than 20 ns. Operating Modes Mode/Pin Read Output Disable Standby Rapid Program(2) CE VIL X VIH VIL VIL VIH (4) OE VIL VIH X VIH VIL X VIL PGM X(1) X X VIL VIH X X Ai Ai X X Ai Ai X A9 = VH(3) A0 = VIH or VIL A1 - A16 = VIL VPP X(1) X X(5) VPP VPP VPP VCC Outputs DOUT High Z High Z DIN DOUT High Z Identification Code PGM Verify PGM Inhibit Product Identification Notes: 1. 2. 3. 4. 5. VIL X can be VIL or VIH. Refer to the Programming characteristics. VH = 12.0 0.5V. Two identifier words may be selected. All Ai inputs are held low (VIL), except A9, which is set to VH, and A0, which is toggled low (VIL) to select the Manufacturer's Identification word and high (VIH) to select the Device Code word. Standby VCC current (ISB) is specified with VPP = VCC. VCC > VPP will cause a slight increase in ISB. 3 DC and AC Operating Conditions for Read Operation AT27C2048 -55 Operating Temperature (Case) VCC Power Supply Com. Ind. 0C - 70C -40C - 85C 5V 10% -70 0C - 70C -40C - 85C 5V 10% -90 0C - 70C -40C - 85C 5V 10% -12 0C - 70C -40C - 85C 5V 10% -15 0C - 70C -40C - 85C 5V 10% DC and Operating Characteristics for Read Operation Symbol ILI ILO IPP1(2) Parameter Input Load Current Output Leakage Current VPP(1) Read/Standby Current Condition VIN = 0V to VCC VOUT = 0V to VCC VPP = VCC ISB1 (CMOS) CE = VCC 0.3V ISB2 (TTL) CE = 2.0 to VCC + 0.5V f = 5 MHz, IOUT = 0 mA, CE = VIL -0.6 2.0 IOL = 2.1 mA IOH = -400 A 2.4 Min Max 1 5 10 100 1 35 0.8 VCC + 0.5 0.4 Units A A A A mA mA V V V V ISB VCC(1) Standby Current ICC VIL VIH VOL VOH Notes: 1. 2. VCC Active Current Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage VCC must be applied simultaneously or before VPP, and removed simultaneously or after VPP. VPP may be connected directly to VCC, except during programming. The supply current would then be the sum of ICC and IPP. AC Characteristics for Read Operation AT27C2048 -55 Symbol tACC(3) tCE(2) tOE(2)(3) tDF(4)(5) Parameter Address to Output Delay CE to Output Delay OE to Output Delay OE or CE High to Output Float, whichever occurred first Output Hold from Address, CE or OE, whichever occurred first 1. 7 Condition CE = OE = VIL OE = VIL CE = VIL Min Max 55 55 20 20 Min -70 Max 70 70 30 20 Min -90 Max 90 90 35 20 Min -12 Max 120 120 40 30 Min -15 Max 150 150 50 35 Units ns ns ns ns tOH(4) 7 0 0 0 ns Notes: 2, 3, 4, 5. See the AC Waveforms for Read Operation diagram. 4 AT27C2048 AT27C2048 AC Waveforms for Read Operation(1) Notes: 1. 2. 3. 4. 5. Timing measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless otherwise specified. OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE. OE may be delayed up to tACC - tOE after the address is valid without impact on tACC. This parameter is only sampled and is not 100% tested. Output float is defined as the point when data is no longer driven. Input Test Waveforms and Measurement Levels For -55 devices only: Output Test Load tR, tF < 5 ns (10% to 90%) For -70, -90, -12 and -15 devices: Note: CL = 100 pF including jig capacitance, except for the -55 devices, where CL = 30 pF. tR, tF < 20 ns (10% to 90%) Pin Capacitance (f = 1 MHz T = 25C)(1) Typ CIN COUT Note: Max 10 12 Units pF pF Conditions VIN = 0V VOUT = 0V 4 8 Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested. 5 Programming Waveforms(1) Notes: 1. 2. 3. The Input Timing Reference is 0.8V for V IL and 2.0V for VIH. tOE and tDFP are characteristics of the device but must be accommodated by the programmer. When programming the AT27C2048, a 0.1 F capacitor is required across VPP and ground to suppress spurious voltage transients. DC Programming Characteristics TA = 25 5C, VCC = 6.5 0.25V, VPP = 13.0 0.25V Limits Symbol ILI VIL VIH VOL VOH ICC2 IPP2 VID Parameter Input Load Current Input Low Level Input High Level Output Low Voltage Output High Voltage VCC Supply Current (Program and Verify) VPP Supply Current A9 Product Identification Voltage CE = VIL 11.5 IOL = 2.1 mA IOH = -400 A 2.4 50 30 12.5 Test Conditions VIN = VIL, VIH -0.6 2.0 Min Max 10 0.8 VCC + 0.5 0.4 Units A V V V V mA mA V 6 AT27C2048 AT27C2048 AC Programming Characteristics TA = 25 5C, VCC = 6.5 0.25V, VPP = 13.0 0.25V Test Conditions(1) Symbol tAS tOES tDS tAH tDH tDFP tVPS tVCS tPW tOE tPRT Notes: 1. 2. 3. Limits AC Conditions of Test Min 2 Input Rise and Fall Times (10% to 90%) 20ns Input Pulse Levels 0.45V to 2.4V Input Timing Reference Level 0.8V to 2.0V 2 2 0 2 0 2 2 130 Max Units s s s s s ns s s 52.5 150 50 s ns ns Parameter Address Setup Time OE Setup Time Data Setup Time Address Hold Time Data Hold Time OE High to Output Float Delay(2) VPP Setup Time VCC Setup Time PGM Program Pulse Width Data Valid from OE VPP Pulse Rise Time During Programming (3) Output Timing Reference Level 0.8V to 2.0V 47.5 VCC must be applied simultaneously or before VPP and removed simultaneously or after VPP. This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven --see timing diagram. Program Pulse width tolerance is 50 sec 5%. Atmel's 27C2048 Intergrated Product Identification Code Pins Codes Manufacturer Device Type A0 0 1 015-08 0 0 O7 0 1 O6 0 1 O5 0 1 O4 1 1 O3 1 0 O2 1 1 O1 1 1 O0 0 1 Hex Data 001E 00F7 7 AT27C2048 Rapid Programming Algorithm A 50 s CE pulse width is used to program. The address is set to the first location. V CC is raised to 6.5V and V PP is raised to 13.0V. Each address is first programmed with one 50 s CE pulse without verification. Then a verification/reprogramming loop is executed for each address. In the event a word fails to pass verification, up to 10 successive 50 s pulses are applied with a verification after each pulse. If the word fails to verify after 10 pulses have been applied, the part is considered failed. After the word verifies properly, the next address is selected until all have been checked. VPP is then lowered to 5.0V and VCC to 5.0V. All words are read again and compared with the original data to determine if the device passes or fails. 8 AT27C2048 Ordering Information tACC (ns) 55 ICC (mA) Active 35 Standby 0.1 Ordering Code AT27C2048-55JC AT27C2048-55PC AT27C2048-55VC AT27C2048-55JI AT27C2048-55PI AT27C2048-55VI AT27C2048-70JC AT27C2048-70PC AT27C2048-70VC AT27C2048-70JI AT27C2048-70PI AT27C2048-70VI AT27C2048-90JC AT27C2048-90PC AT27C2048-90VC AT27C2048-90JI AT27C2048-90PI AT27C2048-90VI AT27C2048-12JC AT27C2048-12PC AT27C2048-12VC AT27C2048-12JI AT27C2048-12PI AT27C2048-12VI AT27C2048-15JC AT27C2048-15PC AT27C2048-15VC AT27C2048-15JI AT27C2048-15PI AT27C2048-15VI Package 44J 40P6 40V 44J 40P6 40V 44J 40P6 40V 44J 40P6 40V 44J 40P6 40V 44J 40P6 40V 44J 40P6 40V 44J 40P6 40V 44J 40P6 40V 44J 40P6 40V Operation Range Commercial (0C to 70C) Industrial (-40C to 85C) Commercial (0C to 70C) Industrial (-40C to 85C) Commercial (0C to 70C) Industrial (-40C to 85C) Commercial (0C to 70C) Industrial (-40C to 85C) Commercial (0C to 70C) Industrial (-40C to 85C) 35 0.1 70 35 0.1 35 0.1 90 35 0.1 35 0.1 120 35 0.1 35 0.1 150 35 0.1 35 0.1 Package Type 44J 40P6 40V 44 Lead, Plastic J-Leaded Chip Carrier (PLCC) 40 Lead, 0.600" Wide, Plastic Dual Inline Package (PDIP) 40 Lead, Plastic Thin Small Outline Package (TSOP) 10 x 14 mm 9 |
Price & Availability of AT27C2048
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |